SysAD Bus Pins
SysAD[0:63] |
in/out |
Processor Address/Data Bus. |
64 |
SysADC[0:7] |
in/out |
Processor Address/Data Check Bus. |
8 |
SysCMD[0:8] |
in/out |
Processor Command Bus. |
9 |
RdRdy |
out |
Indicates that the corelogic is ready to acceot a new read transaction. |
1 |
WrRdy |
out |
Indicates that the corelogic is ready to accept a new write transaction. |
1 |
ExtRequest |
out |
Indicates that the corelogic needs to use the SysAD bus. |
1 |
Release |
in |
Indicates that the processor has released the bus to the corelogic. |
1 |
ValidIn |
in |
Indicates that data placed on the SysAD/SysCmd busses by the processor
is valid. |
1 |
ValidOut |
out |
Indicates that data placed on the SysAD/SysCmd busses by the corelogic
is valid. |
1 |
IvdAck |
out |
Indicates the successful completion of a pending processor invalidate
or update request. |
1 |
IvdErr |
out |
Indicates the unsuccessful completion of a pending processor invalidate
or update request. |
1 |
All pins operate as per MIPS R4x00 SysAD Bus.
AGP Bus Pins
AgpAD[0:31] |
in/out |
AGP Address/Data Bus. |
32 |
AgpPar |
in/out |
AGP Parity Indicator. |
1 |
AgpReq |
in |
AGP Bus Request Signal. |
1 |
AgpGnt |
out |
AGP Bus Grant Signal. |
1 |
AgpClk |
out |
AGP Clock Signal. |
1 |
AgpC/BE[0:3] |
t/s |
AGP Command/Byte Enable Bus. |
4 |
AgpReset# |
out |
AGP Reset Signal. |
1 |
AgpFrame# |
s/t/s |
AGP Cycle Frame Signal. |
1 |
AgpTRdy# |
s/t/s |
AGP Target Ready Signal. |
1 |
AgpIRdy# |
s/t/s |
AGP Initiator Ready Signal. |
1 |
AgpStop# |
s/t/s |
AGP Transaction Stop Signal. |
1 |
AgpLock# |
s/t/s |
AGP Bus Lock Signal. |
1 |
AgpIDSel |
out |
AGP Initialization Device Select Signal. |
1 |
AgpPErr# |
in |
AGP Parity Error Signal. |
1 |
AgpSErr# |
in |
AGP System Error Signal. |
1 |
AgpSBO# |
in/out |
AGP Snoop Back Off Signal. |
1 |
AgpSDone |
in/out |
AGP Snoop Done Signal. |
1 |
AgpPipe# |
s/t/s (in) |
AGP Pipelined Request Signal. |
1 |
AgpSBA[0:7] |
in |
AGP SideBand Address Signals. |
8 |
AgpRBF# |
in |
AGP Read Buffer Full Signal. |
1 |
AgpWBF# |
in |
AGP Write Buffer Full Signal. |
1 |
AgpST[0:2] |
out |
AGP Status Bus. |
3 |
AgpAD_STB0 |
s/t/s (in/out) |
AGP Differential AD Bus Strobe 0. |
1 |
AgpAD_STB0# |
s/t/s (in/out) |
AGP Differential AD Bus Strobe 0. |
1 |
AgpAD_STB1 |
s/t/s (in/out) |
AGP Differential AD Bus Strobe 1. |
1 |
AgpAD_STB1# |
s/t/s (in/out) |
AGP Differential AD Bus Strobe 1. |
1 |
AGPTypeDet |
in |
AGP Type Detect. |
1 |
All pins operate as per AGP Specification 2.0.